Tailoring Fault-Tolerance to Quantum Algorithms

QuICS Special Seminar

Speaker: 
Narayanan Rengaswamy (University of Arizona)
Time: 
Thursday, May 2, 2024 - 1:00pm
Location: 
ATL 3100A and Virtual Via Zoom

The standard approach to universal fault-tolerant quantum computing is to develop a general-purpose quantum error correction mechanism that can implement a universal set of logical gates fault-tolerantly. Given such a scheme, any quantum algorithm can be realized fault-tolerantly by composing the relevant logical gates from this set. However, we know that quantum computers provide a significant quantum advantage only for specific quantum algorithms. Hence, a universal quantum computer can likely gain from compiling such specific algorithms using tailored quantum error correction schemes. In this work, we take the first steps towards such algorithm-tailored quantum fault-tolerance. We consider Trotter circuits in quantum simulation, which is an important application of quantum computing. We develop a solve-and-stitch algorithm to systematically synthesize physical realizations of Clifford Trotter circuits on the well-known [[n,n−2,2]] error-detecting code family. Our analysis shows that this family implements Trotter circuits with optimal depth, thereby serving as an illuminating example of tailored quantum error correction. We achieve fault-tolerance for these circuits using flag gadgets, which add minimal overhead. The solve-and-stitch algorithm has the potential to scale beyond this specific example and hence provide a principled approach to tailored fault-tolerance in quantum computing.

The paper is available at: https://arxiv.org/abs/2404.11953. It is closely related to my prior work on the Logical Clifford Synthesis (LCS) algorithm: https://arxiv.org/abs/1907.00310, whose implementation is available at: https://github.com/nrenga/symplectic-arxiv18a.

*We strongly encourage attendees to use their full name (and if possible, their UMD credentials) to join the zoom session.*